(kicad_pcb (version 20171130) (host pcbnew 5.1.4+dfsg1-1)
  (general
    (thickness 1.6)
    (drawings 322)
    (tracks 128)
    (zones 0)
    (modules 10)
    (nets 9)
  )
  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )
  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.150000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )
  (net 0 "")
  (net 1 Board_1-Board_1-/BP_B1+)
  (net 2 Board_1-Board_1-/BP_B1-)
  (net 3 Board_1-Board_1-/BP_B2+)
  (net 4 Board_1-Board_1-/BP_B2-)
  (net 5 Board_2-Board_1-/BP_B1+)
  (net 6 Board_2-Board_1-/BP_B1-)
  (net 7 Board_2-Board_1-/BP_B2+)
  (net 8 Board_2-Board_1-/BP_B2-)
  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net Board_1-Board_1-/BP_B1+)
    (add_net Board_1-Board_1-/BP_B1-)
    (add_net Board_1-Board_1-/BP_B2+)
    (add_net Board_1-Board_1-/BP_B2-)
    (add_net Board_2-Board_1-/BP_B1+)
    (add_net Board_2-Board_1-/BP_B1-)
    (add_net Board_2-Board_1-/BP_B2+)
    (add_net Board_2-Board_1-/BP_B2-)
  )
  (module batteryPack:BAT_BK-18650-PC4 (layer B.Cu) (tedit 5EEA42C1)
    (at 113.003053 89.001001 270)
    (fp_text reference BT1 (at -36.195 19.05 90) (layer B.SilkS) hide)
    (fp_text value BK-18650-PC4 (at -28.84 -19.05 90) (layer B.Fab))
    (pad 2+ thru_hole oval (at -36.2 -9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 7 Board_2-Board_1-/BP_B2+))
    (pad 2 thru_hole oval (at 36.2 -9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 8 Board_2-Board_1-/BP_B2-))
    (pad 1 thru_hole oval (at 36.2 9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 6 Board_2-Board_1-/BP_B1-))
    (pad 1+ thru_hole oval (at -36.2 9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 5 Board_2-Board_1-/BP_B1+))
    (model C:/Users/mp363/Desktop/BK-18650-PC4/BAT_BK-18650-PC4.step
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz -90 0 -90))
    )
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 133.003053 92.001001 270)
    (fp_text reference J12 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B2- (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 8 Board_2-Board_1-/BP_B2-))
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 133.003053 86.001001 270)
    (fp_text reference J11 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B1- (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 6 Board_2-Board_1-/BP_B1-))
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 133.003053 79.001001 270)
    (fp_text reference J10 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B1+ (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 5 Board_2-Board_1-/BP_B1+))
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 133.003053 99.001001 270)
    (fp_text reference J9 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B2+ (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 7 Board_2-Board_1-/BP_B2+))
  )
  (module batteryPack:BAT_BK-18650-PC4 (layer B.Cu) (tedit 5EEA42C1)
    (at 70.001001 89.001001 270)
    (fp_text reference BT1 (at -36.195 19.05 90) (layer B.SilkS) hide)
    (fp_text value BK-18650-PC4 (at -28.84 -19.05 90) (layer B.Fab))
    (pad 2+ thru_hole oval (at -36.2 -9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 3 Board_1-Board_1-/BP_B2+))
    (pad 2 thru_hole oval (at 36.2 -9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 4 Board_1-Board_1-/BP_B2-))
    (pad 1 thru_hole oval (at 36.2 9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 2 Board_1-Board_1-/BP_B1-))
    (pad 1+ thru_hole oval (at -36.2 9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 1 Board_1-Board_1-/BP_B1+))
    (model C:/Users/mp363/Desktop/BK-18650-PC4/BAT_BK-18650-PC4.step
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz -90 0 -90))
    )
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 90.001001 92.001001 270)
    (fp_text reference J12 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B2- (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 4 Board_1-Board_1-/BP_B2-))
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 90.001001 86.001001 270)
    (fp_text reference J11 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B1- (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 2 Board_1-Board_1-/BP_B1-))
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 90.001001 79.001001 270)
    (fp_text reference J10 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B1+ (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 1 Board_1-Board_1-/BP_B1+))
  )
  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF)
    (at 90.001001 99.001001 270)
    (fp_text reference J9 (at 0 16.5 90) (layer F.SilkS) hide)
    (fp_text value B2+ (at 0 -1.25 90) (layer F.Fab))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 3 Board_1-Board_1-/BP_B2+))
  )
  (gr_text V-CUT (at 93 43.999 90) (layer Cmts.User))
  (gr_text V-CUT (at 90 43.999 90) (layer Cmts.User))
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  (gr_line (start 92.1081 58.9953) (end 92.0109 59) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 92.2042 58.981) (end 92.1081 58.9953) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 92.2985 58.9574) (end 92.2042 58.981) (layer Edge.Cuts) (width 0.1))
  (gr_line (start 92.39 58.9247) (end 92.2985 58.9574) (layer Edge.Cuts) (width 0.1))
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