(kicad_pcb (version 20171130) (host pcbnew 5.1.4+dfsg1-1)

  (general
    (thickness 1.6)
    (drawings 109)
    (tracks 64)
    (zones 0)
    (modules 5)
    (nets 5)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.150000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")
  (net 1 Board_1-/BP_B1+)
  (net 2 Board_1-/BP_B1-)
  (net 3 Board_1-/BP_B2+)
  (net 4 Board_1-/BP_B2-)

  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net Board_1-/BP_B1+)
    (add_net Board_1-/BP_B1-)
    (add_net Board_1-/BP_B2+)
    (add_net Board_1-/BP_B2-)
  )

  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF) (tstamp 5FD141FB)
    (at 165 111 270)
    (path /5E83AEC8)
    (fp_text reference J9 (at 0 16.5 90) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value B2+ (at 0 -1.25 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.75 15.25) (end 1.75 1) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 15.25) (end 1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 1) (end -1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_circle (center 0 11) (end 0.25 11.25) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 15) (end -1.25 0) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 15) (end -1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 0) (end 1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 0) (end 1.25 0) (layer Dwgs.User) (width 0.12))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 3 Board_1-/BP_B2+))
  )

  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF) (tstamp 5FD141EF)
    (at 165 91 270)
    (path /5E83A998)
    (fp_text reference J10 (at 0 16.5 90) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value B1+ (at 0 -1.25 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.75 15.25) (end 1.75 1) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 15.25) (end 1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 1) (end -1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_circle (center 0 11) (end 0.25 11.25) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 15) (end -1.25 0) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 15) (end -1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 0) (end 1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 0) (end 1.25 0) (layer Dwgs.User) (width 0.12))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 1 Board_1-/BP_B1+))
  )

  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF) (tstamp 5FD141E3)
    (at 165 98 270)
    (path /5E83B363)
    (fp_text reference J11 (at 0 16.5 90) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value B1- (at 0 -1.25 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.75 15.25) (end 1.75 1) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 15.25) (end 1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 1) (end -1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_circle (center 0 11) (end 0.25 11.25) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 15) (end -1.25 0) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 15) (end -1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 0) (end 1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 0) (end 1.25 0) (layer Dwgs.User) (width 0.12))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 2 Board_1-/BP_B1-))
  )

  (module batteryPack:2mm_Banana-Socket (layer F.Cu) (tedit 5E838ADF) (tstamp 5FD141D7)
    (at 165 104 270)
    (path /5E83B842)
    (fp_text reference J12 (at 0 16.5 90) (layer F.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value B2- (at 0 -1.25 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start 1.75 15.25) (end 1.75 1) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 15.25) (end 1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.75 1) (end -1.75 15.25) (layer F.SilkS) (width 0.15))
    (fp_circle (center 0 11) (end 0.25 11.25) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 15) (end -1.25 0) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 15) (end -1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start 1.25 0) (end 1.25 15) (layer Dwgs.User) (width 0.12))
    (fp_line (start -1.25 0) (end 1.25 0) (layer Dwgs.User) (width 0.12))
    (pad 1 smd rect (at 0 7.5 270) (size 3 15) (layers F.Cu F.Paste F.Mask)
      (net 4 Board_1-/BP_B2-))
  )

  (module batteryPack:BAT_BK-18650-PC4 (layer B.Cu) (tedit 5EEA42C1) (tstamp 5FD141C8)
    (at 145 101 270)
    (path /5E837B36)
    (fp_text reference BT1 (at -36.195 19.05 90) (layer B.SilkS) hide
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_text value BK-18650-PC4 (at -28.84 -19.05 90) (layer B.Fab)
      (effects (font (size 1 1) (thickness 0.015)) (justify mirror))
    )
    (fp_line (start -39 20.05) (end 39 20.05) (layer B.SilkS) (width 0.127))
    (fp_line (start 39 20.05) (end 39 -20.05) (layer B.SilkS) (width 0.127))
    (fp_line (start 39 -20.05) (end -39 -20.05) (layer B.SilkS) (width 0.127))
    (fp_line (start -39 -20.05) (end -39 20.05) (layer B.SilkS) (width 0.127))
    (fp_line (start -39 20.05) (end 39 20.05) (layer B.Fab) (width 0.127))
    (fp_line (start 39 20.05) (end 39 -20.05) (layer B.Fab) (width 0.127))
    (fp_line (start 39 -20.05) (end -39 -20.05) (layer B.Fab) (width 0.127))
    (fp_line (start -39 -20.05) (end -39 20.05) (layer B.Fab) (width 0.127))
    (pad 1+ thru_hole oval (at -36.2 9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 1 Board_1-/BP_B1+))
    (pad 1 thru_hole oval (at 36.2 9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 2 Board_1-/BP_B1-))
    (pad 2 thru_hole oval (at 36.2 -9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 4 Board_1-/BP_B2-))
    (pad 2+ thru_hole oval (at -36.2 -9.6 270) (size 3 4) (drill oval 1 2) (layers *.Cu *.Mask)
      (net 3 Board_1-/BP_B2+))
    (model C:/Users/mp363/Desktop/BK-18650-PC4/BAT_BK-18650-PC4.step
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz -90 0 -90))
    )
  )

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